arm: mx6: cm-fx6: map HDMI to IPU1 DI0 explicitly

U-Boot does not explicitly assign the display to an IPU interface. Instead, it
relies on the power-on default of DI0.

Since the kernel reassigns HDMI display to DI1, after a warm reset the HDMI
display no longer works in U-Boot.

Fix this by explicitly assigning HDMI to IPU1 DI0 in U-Boot.

Cc: Stefano Babic <[email protected]>
Cc: Igor Grinberg <[email protected]>
Signed-off-by: Nikita Kiryanov <[email protected]>
Acked-by: Igor Grinberg <[email protected]>

diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
index 7a1bbafaa5565c0a5a3e6f9ff1a3979dde762116..b500f916a0c06d7475ebefc5d02127a0c77c54a5 100644 (file)
--- a/board/compulab/cm_fx6/cm_fx6.c
+++ b/board/compulab/cm_fx6/cm_fx6.c
@@ -83,6 +83,7 @@ size_t display_count = ARRAY_SIZE(displays);
 static void cm_fx6_setup_display(void)
 {
        struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+       struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
        int reg;
 
        enable_ipu_clock();
@@ -90,6 +91,7 @@ static void cm_fx6_setup_display(void)
        reg = __raw_readl(&mxc_ccm->CCGR3);
        reg |= MXC_CCM_CCGR3_IPU1_IPU_DI0_MASK;
        writel(reg, &mxc_ccm->CCGR3);
+       clrbits_le32(&iomuxc_regs->gpr[3], MXC_CCM_CCGR3_IPU1_IPU_DI0_MASK);
 }
 #else
 static inline void cm_fx6_setup_display(void) {}